8085 Instruction Set

  Opcode Operand Description SIM None Set Interrupt Mask     —    This is a multipurpose instruction and used  to  implement   the   8085   interrupts   7.5,   6.5,   5.5,   and   serial data   output. —    The   instruction   interprets   the   accumulator   contents   as  follows. —    Example:   SIM    

  Opcode Operand Description RIM None Read Interrupt Mask     —    This   is   a   multipurpose   instruction   used   to   read   the status   of   interrupts   7.5,   6.5,   5.5   and   read   serial   data input   bit. —    The   instruction   loads   eight   bits   in   the   accumulator  with the  following   interpretations. —    Example:   RIM  

  Opcode Operand Description EI None Enable interrupt     —    The   interrupt   enable   flip-flop   is   set   and   all   interrupts  are   enabled. —    No  flags  are   affected. —    This   instruction   is   necessary   to   re-enable   the interrupts  (except   TRAP). —    Example:   EI

  Opcode Operand Description DI None Disable interrupt     —    The   interrupt   enable   flip-flop   is   reset   and   all   the interrupts  except  the TRAP  are   disabled. —    No  flags  are   affected. —    Example:   DI

  Opcode Operand Description HLT None Halt     —    The  CPU  finishes executing the   current  instruction and halts  any  further   execution. —    An   interrupt   or   reset   is   necessary   to   exit   from   the   halt state. —    Example:   HLT

  Opcode Operand Description NOP None No operation     —    No  operation is   performed. —    The instruction is  fetched  and  decoded  but   no operation is   executed. —    Example:   NOP

  Opcode Operand Description RST 0 – 7 Restart (Software Interrupts)     —    The   RST   instruction   jumps   the   control  to   one   of   eight memory locations depending upon the   number. —    These   are   used   as   software   instructions   in   a   program  to  transfer  program  execution  to  one of the eight locations. —    Example:  RST   3 . Instructions Restart Address RST 0 0000 H RST 1 0008 H RST 2 0010 H RST 3 0018 H RST 4 0020 H RST 5 0028 H RST 6 0030 H RST 7 0038 H  

  Opcode Operand Description Rx None Call conditionally     —    The  program  sequence is  transferred  from  the subroutine   to   the   calling   program  based   on   the specified  flag  of the   PSW. —    The   two   bytes   from   the   top   of   the   stack   are   copied   into  the  program  counter,  and  program  execution begins   at the new   address. —    Example:   RZ.         Opcode Description Status Flags RC Return if Carry CY = 1 RNC Return if No Carry CY = 0 RP Return if Positive S = 0 RM Return if Minus S = 1 RZ Return if Zero Z = 1 RNZ Return if No Zero Z = 0 RPE Return if Parity Even P = 1 RPO Return if Parity Odd P = 0

  Opcode Operand Description RET None Return unconditionally     —    The  program  sequence is  transferred  from   the subroutine  to  the calling   program. —    The   two   bytes   from   the   top   of   the   stack   are   copied   into  the  program  counter,  and  program  execution begins   at the new   address. —    Example:   RET.

    Opcode Operand Description Cx 16-bit address Call conditionally     —    The  program  sequence is  transferred  to  the   memory location specified  by  the  16 -bit address  given  in the  operand  based on the specified  flag  of the   PSW. —    Before   the   transfer,  the   address   of   the   next   instruction  after  the call (the  contents  of the  program counter)  is pushed  onto  the   stack. —    Example:  CZ 20 3 4   H.         Opcode Description Status Flags CC Call if Carry CY = 1 CNC Call if No Carry CY = 0 CP Call if Positive S = 0 CM Call if Minus S = 1 CZ Call if Zero Z = 1 CNZ Call if No Zero Z = 0 CPE Call if Parity Even P = 1 CPO Call if Parity Odd P = 0