8085 Instruction Set

  Opcode Operand Description RIM None Read Interrupt Mask     —    This   is   a   multipurpose   instruction   used   to   read   the status   of   interrupts   7.5,   6.5,   5.5   and   read   serial   data input   bit. —    The   instruction   loads   eight   bits   in   the   accumulator  with the  following   interpretations. —    Example:   RIM  

  Opcode Operand Description EI None Enable interrupt     —    The   interrupt   enable   flip-flop   is   set   and   all   interrupts  are   enabled. —    No  flags  are   affected. —    This   instruction   is   necessary   to   re-enable   the interrupts  (except   TRAP). —    Example:   EI

  Opcode Operand Description DI None Disable interrupt     —    The   interrupt   enable   flip-flop   is   reset   and   all   the interrupts  except  the TRAP  are   disabled. —    No  flags  are   affected. —    Example:   DI

  Opcode Operand Description HLT None Halt     —    The  CPU  finishes executing the   current  instruction and halts  any  further   execution. —    An   interrupt   or   reset   is   necessary   to   exit   from   the   halt state. —    Example:   HLT

  Opcode Operand Description NOP None No operation     —    No  operation is   performed. —    The instruction is  fetched  and  decoded  but   no operation is   executed. —    Example:   NOP

  Opcode Operand Description RST 0 – 7 Restart (Software Interrupts)     —    The   RST   instruction   jumps   the   control  to   one   of   eight memory locations depending upon the   number. —    These   are   used   as   software   instructions   in   a   program  to  transfer  program  execution  to  one of the eight locations. —    Example:  RST   3 . Instructions Restart Address RST 0 0000 H RST 1 0008 H RST 2 0010 H RST 3 0018 H RST 4 0020 H RST 5 0028 H RST 6 0030 H RST 7 0038 H